发明名称 Enhanced Load Lookahead Prefetch in Single Threaded Mode for a Simultaneous Multithreaded Microprocessor
摘要 A method, system, and computer program product are provided for enhancing the execution of independent loads in a processing unit. A processing unit detects if a long-latency miss associated with a load instruction has been encountered. Responsive to a long-latency miss, the processing unit enters a load lookahead mode. Responsive to entering the load lookahead mode, the processing unit dispatches each instruction from a first set of instructions from a first buffer with an associated vector. The processing unit determines if the first set of instructions from the first buffer have completed execution. Responsive to completed execution of the first set of instructions from the first buffer, the processing unit copies the set of vectors from a first vector array to a second vector array. Then the processing unit dispatches a second set of instructions from a second buffer with an associated vector from the second vector array.
申请公布号 US2008313425(A1) 申请公布日期 2008.12.18
申请号 US20070763760 申请日期 2007.06.15
申请人 LE HUNG Q;NGUYEN DUNG Q 发明人 LE HUNG Q.;NGUYEN DUNG Q.
分类号 G06F15/00 主分类号 G06F15/00
代理机构 代理人
主权项
地址