发明名称 Digital timer circuit
摘要 An improved method of operating a digital timer using line currents of different frequencies such as 50 and 60 hertz. The line current is rectified and converted into square wave pulses at the line current frequency. Upon actuation of a start switch to initiate the timing cycle, the logic circuitry is cleared and synchronized at the line current frequency. The square wave pulses are compared to internally generated clock pulses to determine the line current frequency, and then modified along parallel paths to provide pulses at various frequencies including timing pulses at a timing frequency of ten hertz. The timing interval may be manually or automatically externally established and counters are incremented by the timing pulses at the timing frequency of ten hertz. A comparator actuates a signal when the value in the counters equals the desired timing interval. A scale factor is provided to increase the capacity of the counters by decreasing the timing pulse frequency to 1 hertz. A visible display is provided which increments as the counters increment to provide an indication of the elapsed time.
申请公布号 US4027470(A) 申请公布日期 1977.06.07
申请号 US19750565233 申请日期 1975.04.04
申请人 FRIEDMAN, ELIOT I. 发明人 FRIEDMAN, ELIOT I.
分类号 G04F1/00;G04G3/02;G04G15/00;(IPC1-7):G04F3/02;G06F7/38;G01R23/02 主分类号 G04F1/00
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