发明名称 CONTROL CIRCUIT FOR MEMORY UNIT
摘要 <p>PURPOSE:To increase the utilizing efficienty of the memory unit, by making variable the operating cycle of the memory unit, that is, the memory cycle, depending on the operating mode and by operating the unit with continuous cycle without making vacant time between the memory cycles.</p>
申请公布号 JPS52153631(A) 申请公布日期 1977.12.20
申请号 JP19760069798 申请日期 1976.06.16
申请人 HITACHI LTD 发明人 IWAI GIICHI
分类号 G11C11/41;G06F12/00;G06F12/06;G11C7/22 主分类号 G11C11/41
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