| 摘要 |
PURPOSE:To make it possible to grasp by intuition whether patching is correct or not, by systematically displaying on a display unit a patching state between arithmetic elements on a patch board. CONSTITUTION:When relays RL11-RL43 are all operated, check signal PCA1 is sent to output jacks J13 and J14 via relay RL13 and then reaches input jacks J21 and J41, and outputs of OR gates G21 and G41 are held at ''H'' through relays RL21 and RL41. Further, signal PCA1 is supplied to differentiating circuit DF1 to actuate character signal generator CG1 and bar signal generator BG1, and start signal SS, character signal SC and bar signal SB are generated from OR gates 15 and 16. On the other hand, when check pulse PCB2 is supplied to the operational element OP2 side while check signal PCA1 is supplied, start signal SS and charactr signal SC are outputted from OR gates G25 and G26. Signals SC and SS are inputted to memory MM by way of OR gates G01, G02 and G03 and then displayed on display unit DP through D/A converter ADC. |
