发明名称 MES TYPE INTEGRATED CIRCUIT
摘要 PURPOSE:To lower power consumption and accelerate speed by a mechanism wherein a base of a load bipolar and a source of a SIT are made common, and a collector is contacted with gate metal in a resistive shape as one portion of a gate, in a SITL using the MET-SIT as a drive transistor. CONSTITUTION:An inverted vertical SIT is formed by a P<+> type collector 14 contacting with an N<+> type source 11, an N<-> type channel 13, MES gate electrodes 4 and a MES gate electrode in an ohmic shape, and a horizontal bipolar is formed by a P<+> type emitter 15, an N<-> type base 13a, an N<+> base 12 and the P<+> type collector 14. The P<+> type collector 14 functions as one portion of a gate region of the SIT. The SIT works as a normally-OFF type. Since the horizontal PNP bipolar provides a high hole reaching rate and the MES gate electrode SIT gives a decreased small number carrier accumulating effect, low power consumption and operation at high speed can be attained.
申请公布号 JPS5636154(A) 申请公布日期 1981.04.09
申请号 JP19790112552 申请日期 1979.09.03
申请人 SEIKO INSTR & ELECTRONICS 发明人 SHINPO MASAFUMI
分类号 H01L29/80;H01L21/8222;H01L27/02;H01L27/06 主分类号 H01L29/80
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