| 摘要 |
PURPOSE:To avoid the overload of the output circuit, by delivering the three types of information through a piece of the output terminal and then securing a simultaneous conduction for both the 1st and 2nd switch elements to deliver 1 and 0 each of the output circuit in case a residual type of the information is under the storage state. CONSTITUTION:The gate of the switching transistor TR3 for output of a low level is connected to the 1-bit memory circuit 1 as well as the inverse output Q1' of the circuit 1. In addition to the TR3, the switching TR4 for a high level is provided with its gate connected to the memory circut 2 as well as the inverse output Q2' of the circuit 2. Then a common connection is secured between the source of the TR3 and the drain of the TR4 to form a digital circuit. And the truth chart of the digital circuit is produced as shown in the table 1, thus delivering three types of information 1, 0 and the high resistance through a piece of the output terminal 5. At the same time, both the TR3 and 4 are made to conduct when both the outputs Q1 and Q2 of the memory circuits 1 and 2 are logic 1. Thus the output is inhibited to avoid the overload of the output circuit. |
