| 摘要 |
A digital phase comparator for essentially eliminating the dead zone in the phase correction means of a phase locked loop. The digital phase comparator is arranged to provide respective up and down output pulses to operate respective charge pumps. The up and down output pulses at all times are greater than a predetermined time duration no matter how small the phase difference between comparator input signals. A delay means is provided in the phase comparator logic, which delay means substantially determines such predetermined time duration. The minimum pulse duration of the up and down signals is selected to be at least of a duration sufficient to operate its respective charge pump, thereby overcoming the finite turn on time of the respective charge pump, no matter how small the phase error. |
