发明名称 SHIFT REGISTER
摘要 PURPOSE:To decrease the number of MOS transistors constituting 1 stage each, by forming each stage by use of a switching MOS transtor responding to a storage element of a prescribed time constant, and a one-way conducting MOS transistor. CONSTITUTION:When an MOS transistor T1 conducts by a prescribed clock phi2, voltage of a joint 1 rises through a capacitor forming a storage circuit of a prescribed time constant, by a high level input from a terminal 11. Subsequently, a switching MOS transistor T2 to which a clock being 180 deg. out of phase with the clock phi2 is applied becomes on, a one-way conducting MOS transistor T3 conducts, and a high level is stored in the capacitor of the same time constant storage element. As a result, a joint 3 becomes a high level, and a switching MOS transistor T4, etc. of the next stage are controlled. Accordingly, each stage of a shift register is formed by a few MOS transistors, for instance, 2 groups, etc. In this way, it is possible to obtain a shift register of high density, high speed and low power consumption.
申请公布号 JPS5769595(A) 申请公布日期 1982.04.28
申请号 JP19800144211 申请日期 1980.10.14
申请人 FUJITSU KK 发明人 MIYAMOTO YOSHIHIRO;YAMAMOTO TOSHIROU
分类号 G11C19/28;G11C19/00;G11C19/18 主分类号 G11C19/28
代理机构 代理人
主权项
地址