EFL Toggle flip-flop

摘要

A toggle flip-flop of the type which is controlled by a clock signal capable of assuming high and low states includes a master circuit portion and a slave circuit portion. The master circuit portion includes a first output stage which is latched when the clock signal is high while the slave circuit portion has an output stage which is latched when the clock signal is low. A driving voltage signal is produced in the slave circuit portion for driving the second output stage. Means are provided for inverting the driving voltage signal and for using the inverted version to drive the first output stage.