发明名称 SIGNAL DETECTING CIRCUIT
摘要 PURPOSE:To substantially improve a signal-to-noice ratio of a signal even in case when it is difficult to detect a signal exactly, by executing the signal processing of a binary decoded recording readout output. CONSTITUTION:To a data input terminal 25, an output of an OR circuit is applied through its OR circuit. On the other hand, to a clock input terminal 24, a clock shown in S is applied. A Wallis tree 18 totals the number of ''1'' outputted to the output terminal of a shift register 17, and outputs (m)-(o). Also, the question whether both of an output of a D flip-flop 19 and an output of the shift register 17 are ''0'' or not is decided by an NOR logical circuit 21, AND with the previous result of a digital comparator 20 is taken by an AND logical circuit 22, and an output shown in (r) is obtained. By an output of this AND logical circuit 22, a spikelike noise is removed entirely.
申请公布号 JPS57189315(A) 申请公布日期 1982.11.20
申请号 JP19810075233 申请日期 1981.05.18
申请人 MATSUSHITA DENKI SANGYO KK 发明人 MURAI KATSUMI
分类号 G06F11/00;G11B20/10;G11B20/22 主分类号 G06F11/00
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