发明名称 KEY INPUT DETECTING CIRCUIT SYSTEM
摘要 PURPOSE:To reduce the consumption of electric power and also reduce a chip area of an integrated circuit by discriminating and processing keys only for a prescribed period after the variation of a significant input through a selective differential circuit, an FF, a clock generating circuit and a key input deciding circuit, etc. CONSTITUTION:A selective differential circuit 10 detects signals from key input group SW1-SW3 and its output sets up an FF20, permitting an output signal (a) of the FF20 and the output of a sampling clock generating circuit 30. Subsequently an output signal (b) of the circuit 30 and a key input discriminating circuit 40 are actuated and, after prescribed discrimination, a signal (c) for resetting the FF20 is outputted and a key input is detected only for a prescribed period after the variation of a significant input from a circuit 10. When every key input signal coincides over the prescribed number of sampling times, it is discriminated that the circuit 40 has no chattering.
申请公布号 JPS5818734(A) 申请公布日期 1983.02.03
申请号 JP19810117324 申请日期 1981.07.27
申请人 SUWA SEIKOSHA KK 发明人 TACHIBANA SETSUZOU
分类号 G06F3/02;G06F1/32 主分类号 G06F3/02
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