发明名称 MODEM FOR FULLY DOUBLE COMMUNICATION
摘要 PURPOSE:To give no effect to the rewriting of transmission data due to synchronizing action, by switching the transmission and reception or a modulating process at a moment when the value of a counter which counts the modulating and demodulating frequencies at a signal processing part reaches a prescribed level. CONSTITUTION:Counters 13 and 14 that count modulating and demodulating frequencies respectively are added to a signal processing part 10. The transmission/ reception or the modulating process is switched when the value of either the counter 13 or 14 reaches a prescribed level. Thus a prescribed process is carried out in a desired cycle regardless of the extension of the receiving timing clock due to synchronizing action. Thus no effect is given to the rewriting of the transmission/reception data. As a result, the occurrence can be prevented for a data error since no effect is given to the writing of the transmission/reception data due to the synchronizing action.
申请公布号 JPS5840944(A) 申请公布日期 1983.03.10
申请号 JP19810137748 申请日期 1981.09.03
申请人 HITACHI SEISAKUSHO KK 发明人 SHINADA SHIGEO
分类号 H04L5/14;H04L27/00 主分类号 H04L5/14
代理机构 代理人
主权项
地址