发明名称 PHASE LOCKED LOOP
摘要 PURPOSE:To attain excellent lock-in characteristics, by forming a voltage corresponding to the difference between an oscillation frequency of a VCO and an external input signal frequency before the start of lock-in, taking the value of said voltage as the initial value of a control voltage, stopping once the oscillation of the VCO and restarting the oscillation in synchronizing with the input. CONSTITUTION:When a lock-in start instruction signal 31 is given, a counter 16, FFs 22, 25 are reset, and then a counter 20 is reset and an AND circuit 14 is set off, then an external input signal 30 and an output signal 33 of the VCO are counted at the same time. When the count value of the counter 20 reaches a prescribed value, a monostable multivibrator 21 and an FF25 are set, the AND circuit 14 is set on, the count of the counter 16 is stopped, a lock-in start signal 32 is risen, a voltage obtained from the D-A conversion of the difference of both counters is applied to the VCO via a gate 15. Since the lock-in start signal is risen, the oscillation of the VCO is stopped. After a prescribed time, an output of the monostable multivibrator 21 falls down and the VCO starts oscillation in synchronizing with an external signal 30.
申请公布号 JPS58107729(A) 申请公布日期 1983.06.27
申请号 JP19810207772 申请日期 1981.12.22
申请人 NIHON SHIYUUHENKI KK;FUJITSU KK;HITACHI SEISAKUSHO KK 发明人 OGINO AKITO
分类号 G11B20/14;H03L7/10;H03L7/113 主分类号 G11B20/14
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