| 摘要 |
PURPOSE:To reduce the increment of number of refresh divisions below an amount equivalent to number of spare word lines, by driving simultaneously the sense/refresh amplifiers of all memory blocks via an address converting circuit. CONSTITUTION:A high-level output that is delivered via an address switching circuit 8, an address buffer 7, etc. at every refresh cycle is converted through converting circuits 12 and 12 via refresh row decoders 11 and 11' for every memory block. With output of this conversion the sense/refresh amplifier trains 3 at every memory block formed with a main body memory cell array 1 and a spare memory cell array 2 are driven at one time. One of N pieces of word lines and one of n pieces of spare word lines at every memory block are selected at one time to perform refresh. Therefore the increment of number of refresh divisions can be set less than n pieces of spare words in comparison with number of refresh divisions of a semiconductor memory which has no constitution of a redundant circuit. This can prevent a large increment of number of divisions. |
