| 摘要 |
PURPOSE:To expose the wafer alignment marks automatically, to preserve its form on a wafer chip and to decrease the number of the marks largely by forming a small slit to a mask for a wafer step alignment device. CONSTITUTION:The slit 27 disposed to a light shielding band 26 formed to the mask 21 exposes a region containing the wafer alignment mark 29. When an alignment mark 22 on the mask 21 and alignment marks 25 on an alignment chip 24 are aligned and a circuit pattern on the mask 21 is baked, the mark 22 is stacked onto the mark 25 and the mark 25 is patterned. With the mark 29, a positive resist coated onto an upper layer section is exposed through the slit 27, its form is exposed after developing and etching processes are completed, and it is preserved at all times. |
