发明名称 PACKET COMMUNICATION SYSTEM
摘要 PURPOSE:To decrease the time necessary for catching a vacant packet and to reduce ineffective packets, by discriminating packet mode display information of plural number of bits for transmission. CONSTITUTION:A packet received through a receiver circuit 30 from a transmission line 1 is inputted to a decoder section 31 to perform reception/transmission/relay operation with two-bit packet mode display information 7. When the display information 7 is occupied the packet is fetched at a reception circuit 32 and transmits the packet to the transmission line 1 through a transmission circuit 35 and a driver circuit 36. When the information 7 is vacant and transmission request exists in a data buffer 33, the information 7 is occupied with the transmission circuit 34 and transmission data are transmitted from the buffer 33 to the transmission line 1 via the circuits 35, 36.
申请公布号 JPS58170245(A) 申请公布日期 1983.10.06
申请号 JP19820052592 申请日期 1982.03.31
申请人 NIPPON DENKI KK 发明人 ISOGAWA YOUICHI
分类号 H04L12/56 主分类号 H04L12/56
代理机构 代理人
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