| 摘要 |
<p>PURPOSE:To prevent mis-readout and to attain readout at a high speed by providing two precharge transistors (TRs) with different at a current supply capacity or precharge TRs with different current supply capacity having gate potential changing with time. CONSTITUTION:A signal generating circuit 4 detects the change in address signals Axi, Ayi to bring a control signal phiD tentatively at a high level before a word line and data line are driven at memory readout, and when a sense circuit includes a latch circuit, the signal is brought into a low level. Thus, a discharge MOSFETQd is turned on or off to extract the charge on the data lines D1, D2... to be at a ground level (0V), allowing to prevent the data line from being floated before memory readout and noise from hardly being superimposed. While the discharge MOSFETQd is turned on, the precharge MOSFETQp1, Qp2 are turned off to prevent a through-current from conducting to the data lines.</p> |
