| 摘要 |
PURPOSE:To enable to stably perform constant speed control without asynchronization by employing phase comparator having wide synchronizing range. CONSTITUTION:A reference pulse fIN and a feedback pulse fFB are divided in frequency through flip-flops 11, 12, inputted from Q output terminal to the input terminals R1, V1 of the first phase comparator 13, and the phase difference is produced from the output terminals U1, D1. On the other hand, pulses of the inverted waveform divided by two from pulses fIN, fFB are inputted to the input terminals R2, V2 of the second phase comparator 14 from the output terminals Q' of the flip-flops 11, 12, and the phase difference is produced from the output terminals U2, D2. The output pulses from the output terminals U1, V2 are added by an adder 15, and the output pulses from the output terminals D1, D2 are added by an adder 16, the polarity is attached by a differential amplifier 17 and outputted as a phase difference signal. |
