| 摘要 |
PURPOSE:To resolve the conventional problem of data stagnation due to the difference of data speed between input and output by making it possible that the data output speed of a transmittter circuit is controlled by a control processor circuit. CONSTITUTION:Input data is inputted to receiver circuits 21-2n through input data lines 11-1n, and serial data is converted to parallel data there and is transferred to a control processor 3. The control processor selects a transmission line of input data and sends parallel data to a corresponding transmitter circuit. Parallel data is converted to serial data there and is outputted through data output lines 51-5n. Each of transmitter circuits 41-4n has an oscillator, which determines the transmission speed of data to be transmitted for every data output line, and transmits data synchronously with the clock of this oscillator, and the signal which controls the oscillation frequency is transmitted from the control processor circuit 3 through transmission speed control lines 61-6n, and the transmission speed is controlled in the transmitter circuit. |
