发明名称 BASE ADDRESS MODIFYING SYSTEM
摘要 PURPOSE:To improve the speed of transaction and stack processings by providing base address registers in an external circuit of a processor and decoding address data on an address bus to modify the address. CONSTITUTION:Address data 1 on the address bus consists of fields B, S, and D, and contents of the field B indicate whether the base address should be modified or not, and those of the field S indicate the number of a base register used as a modifier, and those of the field D indicate a displacement modifier. Data on the bus 1 is led to an adding circuit 2; and when modification is not designated, this data passes through the adding circuit 2; but when modification is designated, bits of the field S of the modifier are decoded by a register selector 4 to select one of base registers B0-Bn. Contents of the displacement modifier D and contents of the selected base register are added in the circuit 2 to access a memory with new address data. Thus, transaction processings and stack processings are performed in a high speed.
申请公布号 JPS59189447(A) 申请公布日期 1984.10.27
申请号 JP19830064792 申请日期 1983.04.13
申请人 NIPPON DENKI KK 发明人 KAGAWA SHIYUN
分类号 G06F9/355;G06F12/02;G06F13/00 主分类号 G06F9/355
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