发明名称 CENTRAL PROCESSING UNIT INCORPORATING DATA TRANSFER CIRCUIT
摘要 PURPOSE:To exclude a special pin which is used for control of data transfer and to obtain simple and miniature constitution of a data transfer circuit, by using a means for delivering address of both the transfer destination and the transferer of data, a means for counting the number of data transfer words, etc. CONSTITUTION:A means for delivering addresses of both the transfer destination and the transferer of data is provided together with a means for counting the number of data transfer words. For instance, the addresses of the transferer and transfer destination of data and the number of transfer words are written in the 1st and 2nd address generating parts 3 and 4 of a data transfer circuit part 2 as well as to a word number counter 6 by the program of a CPU part 1'. At the same time, a BUSY signal 10 is set at ''1'' together with the holding signal and a holding confirmation answer signal 11 of the part 1'. Then a DMAEN signal 12 is set at ''1'', and the output of the part 3 is enabled when an SELR signal 14 is set at ''1''. The signal 14 is delivered as the address of the transferer. When the signal 12 and an SELW signal 15 are set at ''1'', the address of transfer destination is delivered in the same way.
申请公布号 JPS59200328(A) 申请公布日期 1984.11.13
申请号 JP19830073084 申请日期 1983.04.27
申请人 RICOH KK 发明人 YAGI HIROMITSU;TAKAHASHI TOYOFUMI
分类号 G06F13/28;G06F3/00 主分类号 G06F13/28
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