| 摘要 |
PURPOSE:To transfer a data at a high speed and to increase the number of circuits which can be contained, by constituting so that a processing device receives in parallel only effective data from a data accumulating circuit of an IF circuit basing on a reception request signal and an output of a byte number counting circuit of the IF circuit. CONSTITUTION:In case a data transferred in series from a communicating device 1 is less than (n) bytes, for instance, in case a data Dd of (m) (n>m) bytes is transferred, when a data accumulatin circuit 2-1 of an IF circuit 2 accumulates a data of (m) bytes, a byte number counting circuit 2-2 decides it as end of accumulation by receiving the first one byte signal of an error detecting redundant bit FCS, outputs a byte number BN=(m) of an effective data inputted to the circuit 2-1, and simultaneously, gives an accumulation end signal E to a reception request signal generating circuit 2-3. When E is received, the circuit 2-3 outputs a reception request signal R, and a processing circuit receives only a data of (m) bytes from the circuit 2-1. When a block is continued by (n) bytes or more, no reception request is outputted unless a data of (n) bytes is accumulated in the circuit 2-1, therefore, it will do that a reception processing speed of the processing device is low. |
