发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the area of isolation regions between elements, and to enhance the degree of integration of memory cells at a mask ROM consisting of MOSFETs by a method weherein the drain regions of the memory cells of the plural number are made in common. CONSTITUTION:The gates of the MOSFETs of respective memory rows in a memory array 11 are connected to common word lines W (4) and the drains of the MOSFETs of respective memory columns are connected to common data lines of three pieces D1-D3 (6). The word line of one piece corresponding to the address signal Ax of an X interrelated group out of the word lines W is set to a selection level by an X decorder 12, the word line of one piece corresponding to an address signal Ay of Y interrelated group out of the data lines D is set to a selection level by a Y decorder 13, and reading out of data is executed by detecting existence of a current flow to the drain of the MOSFET positioning at the cross point thereof. Accordingly, storing and reading out of information of three bits can be attained by the MOSFET of one piece, and enhancement of the degree of integration of the memory cells can be attained.
申请公布号 JPS6057962(A) 申请公布日期 1985.04.03
申请号 JP19830164981 申请日期 1983.09.09
申请人 HITACHI SEISAKUSHO KK 发明人 ITOU TOMOYASU
分类号 G11C17/08;H01L21/8246;H01L27/10;H01L27/112;H01L29/78 主分类号 G11C17/08
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