发明名称 BIT PATTERN DISCRIMINATING DEVICE
摘要 PURPOSE:To reduce the number of necessary memories, and also to execute a real time processing by inputting a bit string to be checked to the input terminal of a storing circuit, and inputting its output signal to the input terminal through a latch and a logical circuit. CONSTITUTION:A bit string to be selected is inputted serially to an input terminal AD0 of a ROM3-1 of, for instance, 8X3 bits. Subsequently, ''0'' is inputted to input terminals AD1-2 in an initial state, and thereafter, signals of output terminals D0-1 are inputted, respectively, through a latch 3-2 and AND gates 3-3-4, and the output terminals D0-2 are connected to AND gates 3-5-6. For instance, in case of selecting 011 and 101 by inputting bit strings 010, 101 and 110, an address is generated by putting numbers 0-7 to the necessary node of a tree, and contents 111 of an address corresponding to the bit strings 011, 101, and the contents of other address are outputted from the gate 3-5 and the gate 3-6, respectively.
申请公布号 JPS60134341(A) 申请公布日期 1985.07.17
申请号 JP19830241270 申请日期 1983.12.21
申请人 NIPPON DENKI KK 发明人 OOTERU YOUICHI
分类号 H04L1/00;G06F7/04 主分类号 H04L1/00
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