| 摘要 |
PURPOSE:To set a motor to a synchronous state by applying a disorder signal to a speed control loop by a quasi-synchronization detector, thereby escaping a phase control loop from the quasi-synchronization state. CONSTITUTION:A quasi-synchronization detector 11 detects its state to apply a trigger to a disorder signal generator 12, which generates an AC signal. The AC signal is inputted to an adder 8 to apply a disorder to part of a speed control loop, thereby varying the rotating speed of a motor 2 in both positive and negative directions. As a result, an input signal of a PLL circuit 5 is frequency- modulated in both positive and negative directions with the present quasi-synchronization state as a center, and when further approaching the original synchronization point, it is led-in a true synchronization point, the PLL circuit 5 starts extracting a clock signal, a switch 9 is connected from a contact A side to a contact B side to establish a phase control loop. Thus, the motor 2 is shifted to a normal synchronization state. |
