| 摘要 |
PURPOSE:To perform convolutional operation in time area and enable minituarizing which is practically desirable by providing a cumulative adding device, an address controlling device, a system counter, a RAM address counter and a storing device. CONSTITUTION:The cumulative adder 41 multiplies a digitalized coefficient data string and a multiplicand data string and makes addition. The multiplicand data string supplied to the adder 41 is stored in a ROM42, and address input terminals AD0-AD3 of the ROM42 are connected to output ends Q0-Q4 of a system counter 44 through an address controlling circuit 43. The address signals supplied to the address input terminal of a RAM46 are generated by a RAM address counter 47. In this constitution, the coefficient data string stored in the ROM42 is bisymmetric, and only a half is used, and at the same time, a sampling frequency is quadrupled or quartered. Thus, convolutional operation in time area is made possible, and at the same time, the circuit can be made small which is desirable practically. |
