| 摘要 |
PURPOSE:To preserve display information in the last write address by providing an (n+1)-bit width to a register which designates 2<n>-word memory addresses where operation information of a circuit unit are stored successively, and operating the most significant bit as a pointer. CONSTITUTION:Operation information SD in each operation step of the circuit unit is supplied from an information input line to a memory 10 and is stored in the address designated by n-bit information 21 of an address counter 20. In such a case, information 22 of the most significant bit of the address counter 20 is written as the last write address display information in the least significant bit in a word of the memory 10 together with operation information SD. Each time operation information is written, the address counter 20 is counted up by +1, and n-bit information of the address counter is reset to designate address ''0'' when write in address 2<n> is terminated. In such a case, each time write of the memory 10 is circulated once, information of the most significant bit of the address counter 20 is inverted. |
