发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To reduce a through current to reduce the unnecessary power consumption by connecting a resistance between output drains of a pair of FETs of an inverting circuit of the first stage in two-stage inverting circuits consisting of complementary FETs. CONSTITUTION:When the potential of an input signal 7 falls toward GND from a power source voltage VDD and becomes lower than VDD-¦VTP¦ (threshold voltage of a P-channel CHFET1), the FET1 is made conductive, and the potential of a connection point 9 starts rising. At this time, the time when the gate capacity of an NCHFET4 is charged is longer than the time, when the gate capacity of a PCHFET3 is charged, because of passage of a resistance 11, and the potential of a connection point 10 raised more slowly than the potential of the connection point 9. Consequently, since a time t0 when the FET4 is made conductive is after a time t1 when the FET3 is turned off, both FETs 3 and 4 are not made conductive simultaneously, and the through current is not flowed. When the potential of the connection point 10 becomes higher than VTN (threshold voltage of the FET4), the FET4 is made conductive, and the potential of an output terminal 8 is changed toward the GND side.
申请公布号 JPS60224324(A) 申请公布日期 1985.11.08
申请号 JP19840081348 申请日期 1984.04.23
申请人 NIPPON DENKI KK 发明人 NAKAHIRA MAMORU
分类号 H03K19/0175;H03K17/687;H03K19/00 主分类号 H03K19/0175
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