发明名称 TESTING DEVICE FOR SEMICONDUCTOR MEMORY
摘要 PURPOSE:To enable to test a semiconductor memory in a shorter time even when the test is carried out in combination with the logic test thereof by a method wherein, when the value of an address is one becoming the object of concern regarding the measurement of power current, a measurement command signal is given to the current measurement decision circuit from the test pattern generator and a test of the power current is conducted. CONSTITUTION:When a power source is being supplied to a memory 112 to be tested from a power circuit 116 for the memory 112 to be tested, the current value of current to run on the memory 112 to be tested from the circuit 116 is measured and whether or not the measured current value is within the prescribed extent is decided in comparison with the reference value about the value within a period that a measurement comand signal is given from a test pattern generator 101. The decision of the current value is effected within the period of the measurement command signal, and also, the decision is effected when the current value is an arbitrary phase within the repeat cycle of a test pattern to be set by a decision timing signal, which is given from a timing generator 102, and the result is outputted.
申请公布号 JPS60247941(A) 申请公布日期 1985.12.07
申请号 JP19840103881 申请日期 1984.05.23
申请人 ADOBANTESUTO:KK 发明人 SHIMIZU MASAO
分类号 H01L21/66 主分类号 H01L21/66
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