| 摘要 |
PURPOSE:To make line scrambling function compatible with phase converting function independently of the reading phase by providing a memory having capacity for two frames's share. CONSTITUTION:A horizontal address signal 21, a vertical address signal 31 and frame pulse 41 of writing side are phase regulated by a horizontal synchronizing signal and a vertical synchronizing signal of writing side video input. Polarity of write 2 frame pulse 51 is inverted simply for each frame. A horizontal address signal 61, a vertical address signal 71 and frame pulse 91 of reading side are also phase regulated by a horizontal synchronizing signal and a vertical synchronizing signal of reading side reference input. A read vertical address converter 8 converts vertical address of field period at random, and changes the relation between writing address and reading address at random. Thus, scrambled data are outputted from 2 frame memory 1. |
