| 摘要 |
PURPOSE:To obtain the result of majority decision in a short time with simple constitution by using an AND output between an output data and an input data of a shift register (SR) as the input data to a low-order basic circuit. CONSTITUTION:Suppose that an input data of, e.g., 10-bit is inputted five times repetitively, the 1st data is given as it is to an SR1, the 2nd data coincident with the 1st data is given to an SR2 and ORed with the data in the SR1 to rewrite the SR1. When the data are inputted up to five times similarly, the content of the SR1 is logical 1 with the presence of logical 1 in the 1st to the 5th data only once or over, the content of the SR2 is logical 1 with the presence of twice or over, and the SR3 with three times or over. Thus, the result of majority decision is obtained from the content set to the SR3. |
