| 摘要 |
PURPOSE:To obtain automatically an optimum phase of a sampling clock by supervising a sampling value of transmitted data. CONSTITUTION:A difference between an input signal of a multi-value data setting circuit 24 and an expected value of an input signal is obtained by a difference device 26, whose output is inputted to plural accumulators 27, 28 accumulating the signal at a different phase position. The least accumulated data in the accumulators 27, 28. is used as error data t the position close to the optimum sampling phase and phase shift information of the sampling clock depending on the relation between an eye pattern and the sampling phase. Thus, even if variance in the reception characteristic and a phase error residual of a PLL circuit exist, data recovery with less error rate and no adjustment is obtained. |
