| 摘要 |
PURPOSE:To reduce a burden of a CPU by designating successively an address extending from the head address of a memory of high priority level, which has been set by a head address setting means, to an address determined in advance, and selecting a memory of next high priority level by a memory selecting means, when the address determined in advance has been designated. CONSTITUTION:A bank memory 1 has the highest priority level, and thereafter, in order of bank memories 2, 3, the priority level is determined. This device is constituted so that a bank switching circuit 6 selects one of the bank memories 1-3 based on an address signal from the CPU 7, therefore, the CPU 7 necessitates to output only an address signal, processing for switching the bank memory 1-3 can be made unnecessary, and a burden of the CPU 7 can be reduced by that portion.
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