| 摘要 |
PURPOSE:To remove necessity for the frequency generator and to use the most part of a circuitry in common for the revolutionary speed controlling system of a motor by so forming the system that a brake release signal is obtained when the period of the digital signal reed out from a disc continues to be of a value larger than a prescribed value for a specified period. CONSTITUTION:An RS flip flop circuit 27 is made in set state by a pulse LP1. If the output of a period detecting circuit 25 is in low level during one period TA of the pulse LP1, the RS flip flop circuit 27 is maintained in the set state. And, an AND circuit 29 closes its gate, thereby preventing the pulse LP2 from passing through it. Therefore, the circuit 30 is never reset. If this state is continued for a time N2-fold of the period TA i.e. for the period TB, the Q-output of an RS flip flop circuit 30 is kept at the high level for the said period of time. In result, the Q-output of a D flip flop circuit 31 becomes high level by the timing of a pulse LP4.
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