| 摘要 |
PURPOSE:To process stored information at a high speed by storing information from a data terminal in a latch circuit which operates with a control signal from an external terminal and controlling the circuit operation of a write sys tem, bit by bit, on the basis of the stored information. CONSTITUTION:A circuit DIBC receives a chip selecting signal CS, a write signal WE, and phirw from a various timing generating circuit TG. When the signal CS is held at L and the signal WE is held at L before a chip is selected to indicate writing operation, the timer signal phiff of the latch circuit is generated, signals from external terminals D0-D7 are inputted, and only bits to be written are held L; and phirw0-phirw7 are generated according to the held information in the latch circuit according to H of phirw and sent to eight buffers in an I/O and outputted to information line couples CD. When the signal We is held at L after the signal CS, all bits become writable at the same time. In a readout state wherein the signal WE is at H, 8-bit readout signals of eight buffers are sent out to terminals D0-D7 in parallel with complementary phirw. Consequently, the processing speed of stored information in a dynamic RAM is increased.
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