发明名称 TIME DIVISION MULTIPLE ACCESS CIRCUIT
摘要 PURPOSE:To obtain an access circuit with small size and low cost and coping with diversified specifications by adopting the hardware constitution to be controlled by the software and the hardware constitution of common buses and using lots of conventional components. CONSTITUTION:At first a CPU 27 writes a synchronous code, a station identification code, a scramble pattern, a de-scramble pattern and transmission/reception channel information to a synchronous code station identification code scramble memory 24, a de-scramble memory 25 and a synchronous word detection circuit 16. Then a reception signal is inputted to the circuits 16, 17 and when the detection signals of both the circuits are coincident, an interruption is applied to the CPU 27 to make the address of a reception channel memory 20 coincident with the location of the reception signal. A transmission frame counter 23 is set when it receives a value adding a delay difference between the transmission/ reception signals to a value of a reception frame counter 22 as a phase difference once per frame in a reference station burst so as to provide a flywheel effect.
申请公布号 JPS61187435(A) 申请公布日期 1986.08.21
申请号 JP19850026394 申请日期 1985.02.15
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 KORI TAKEJI
分类号 H04J3/00;H04J3/06 主分类号 H04J3/00
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