发明名称 VIDEO SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To improve both the S/N and the sharpness by equalizing the phase delay quantity of three signals of a subtracting signal of a 1H delay signal and a non-delay signal, and base clip output/input signals and executing the addition and subtraction. CONSTITUTION:A video signal which is inputted to an input terminal 1 is supplied to a 1H cyclic type filter 4 and outputs a subtracting signal of a 1H delay signal and a non-delay signal. Thereafter, it is supplied to a base clip circuit 5. Input/output signals of the base clip circuit 5 are sent to an adding circuit 10 through a phase compensating circuit 7, a coefficient circuit 8 and a coefficient circuit 9. Also, the video signal is sent to the adding circuit 10 through a phase compensating circuit 6. The phase compensating circuits 6, 7 are set so that phases of three input signals to the adder 10 coincide with each other. In this way, as for a signal outputted from an output terminal 2, the S/N is improved and also the sharpness is improved.
申请公布号 JPS61212969(A) 申请公布日期 1986.09.20
申请号 JP19850052258 申请日期 1985.03.18
申请人 HITACHI LTD 发明人 KATO MINORU;NODA MASARU
分类号 H04N5/208;H04N5/21 主分类号 H04N5/208
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