发明名称 MR ENCODING SYSTEM
摘要 PURPOSE:To execute encoding at a high speed by converting a signal to an MR code, based on a counting value of until a change point of inputted black and white. CONSTITUTION:A binary signal of a black and white image which has been received through a bus driver receiver 24 is converted to a series signal by a parallel/series converter 22 and applied to a pre-processing part 18. In the pre-processing part 18, a change point of black and white of the binary series signal is detected by a change point detecting part 19 and a length of white or black is counted by a counter 20 and its count contents are applied to a buffer register 21. When the change point is detected, a DMA request is applied to a DMA control part 17 from the detecting part 19, the contents of the register 21 are transferred to a RAM 14 by, for instance, a byte unit, and when the counter 20 reaches a prescribed value, an interrupting signal is applied to a microprocessor 11. By its interruption, the processor 11 executes a MR encoding processing, based on the contents of the RAM 14.
申请公布号 JPS61212967(A) 申请公布日期 1986.09.20
申请号 JP19850052432 申请日期 1985.03.18
申请人 FUJITSU LTD 发明人 NARADAIRA SADAO
分类号 H04N1/417 主分类号 H04N1/417
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