| 摘要 |
PURPOSE:To easily attain a synchronization by comparing the phase of an input signal with the phase of the fundamental clock signal of a fundamental frequency component of the input signal, and energizing one of two pieces of LPFs by the lead and lag of its output. CONSTITUTION:When a CMI signal is inputted to a phase comparator 1, FF 10 and 11 detect the CMI signal at the leading and at the trailing of a fundamental clock pulse, and generate signals A, B. The signals A, B become signals C, D through NOTs 12, 13 and ANDs 14, 15. A gate 4 takes ANDs 17, 18 by an output of the NOT circuit 16 of the CMI signal and the signals C, D, and erases unnecessary signals C (D) which are generated due to the difference of a rise of the CMI signal. LPFs 2b (2a) are energized by the remaining signals D (C), and the phase of a counter 3 is made to lead or lag. In this way, the time for securing a synchronization with a bit of not only a usual binary signal but also a signal whose leading is different at every bit such as the CMI signal is quickened. |
