发明名称 MEMORY CIRCUIT
摘要 PURPOSE:To access with only one memory access even when the data of a memory to be accessed is present over a word boundary by providing a control circuit which controls the incrementor of an address and the rotator of the data. CONSTITUTION:When the number of data having three bytes and memory addresses An-A0=4k+2 of a forefront byte is read out, memory blocks MEM0, MEM2, and MEM3 are objects of an access, and an incrementor control signal I0 is outputted only to an incrementor INC0, and an individual address (k) is accessed to the memory blocks MEM2, and MEM3, and an individual address (k+1) to the memory block MEM0. Furthermore, each of data buses M2, M3, M0, and M1 is connected to data buses D0-D3 by a rotator ROT, and the data of addresses 4k+2, 4K+3, and 4(k+1)+0 of the memory are outputted to the data buses D0-D2 respectively. An operation to write the data on the memory can be performed in the same manner.
申请公布号 JPS62112292(A) 申请公布日期 1987.05.23
申请号 JP19850253057 申请日期 1985.11.11
申请人 NEC CORP 发明人 YAMAZAKI KEIICHI
分类号 G06F12/04;G06F12/06;G11C7/00 主分类号 G06F12/04
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