| 摘要 |
PURPOSE:To extend an address space by switching the address selectively to the access address from the second processor and that from the first processor to access a read/write memory. CONSTITUTION:When the first processor 1 writes data in a RAM 4, the first processor 1 issues a prescribed address and a write instruction (R/W=1), and the address is led to an address selector 5, and contention to the access address from the second processor 2 is avoided to perform the write access to the RAM 4. At this time, write data (W/D) is issued and is supplied to the RAM 4 through a data selector 6. When the first processor 1 accesses a ROM 3, the first processor 1 issues a prescribed address and a read instruction (R/W=0), and a decoder 7 issues a chip select signal to the ROM 3, and contents of the ROM 3 are read. Thus, the address space in the first processor side is practically extended. |
