| 摘要 |
PURPOSE:To eliminate a connecting hole connecting a memory cell with a wiring, and to improve the degree of integration in a DRAM, by constituting the gate electrode of a switching MISFET with a word line integrally, and constituting the electrode on the other side of an information accumulating capacitance element with a data line. CONSTITUTION:MISFETs Qa-Qk are connected in series so that adjacent MISFETs, share their source areas and drain areas respectively and the source areas (or the drain areas) of the MISFETs Qa and Qk at the end parts are connected to a fixed voltage Vcc. Respective gate electrodes of the MISFETs Qa-Qk are connected electrically to a word line WL extending in a row direction. As for accumulating capacitance elements Ca-Cj in a memory cell M, the electrode on one side of them is connected to the source areas or the drain areas of the MISFETs Qa-Qk, and the electrode on the other side, to a data line DL. In this way, the connecting hole connecting the memory cell with the wiring is eliminated, thereby the degree of integration in the DRAM being improved.
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