| 摘要 |
PURPOSE:To make provision of a redundant bit for inserting or deleting an information bit unnecessary by inverting a continuous counting value of a modulo 2 in the succeeding block or a code of a parity bit contained in such a succeeding block, and transferring it to a collating circuit, whenever a code erros is detected. CONSTITUTION:An output Q of a T-flip-flop 17 is inverted, and in case of a parity check related to the next block, the inversion of output Q of a continuous counting circuit 14 of a modulo 2 is transferred to a collating circuit 16 through a selecting circuit 15. As a result, dissidence to a correct value (a continuous counting value of the modulo 2 of a transmitting side) of a continuous counting value of the modulo 2 is corrected. That is to say, unless a code error is generated in the next block, the inverted output Q of the continuous counting circuit 14 of the modulo 2 becomes '0', and it is collated with a parity bit '0' which has been extracted by a parity bit extracting circuit 13, by the collating circuit 12, and a correct parity check result of no code error is outputted to an output terminal 19.
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