发明名称
摘要 <p>A control circuit is used for matrix drive recording. It includes a microprocessor, a RAM for storing data to be recorded therein, an address signal editing circuit for modifying the input addresses to the RAM, a shift register for converting the data from parallel to serial form and transferring it to a recording circuit, and a DMA controller for reading the data from the RAM and transferring it to the shift register.</p>
申请公布号 JPS6261185(B2) 申请公布日期 1987.12.19
申请号 JP19810142277 申请日期 1981.09.11
申请人 HITACHI LTD 发明人 KOJIMA YASUYUKI;SATO KUNIO;TADAUCHI MITSUHARU;SUEHIRO KOJI;INOE YASUO
分类号 G06F3/12;B41J2/355;B41J2/40;G06K15/00;G06K15/10;H04N1/21 主分类号 G06F3/12
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