| 摘要 |
The arrangement is provided with a system coder (SC), which combines the positive-polarity signals (pc) to be transmitted with the negative-polarity signals (nc) to be transmitted in order to generate from them a 1-bit-to-2-bit coded data stream, with which an additional information signal (Sz) is transmitted along with the main data (Sb). The system coder (SC) comprises a logic circuit (LC) and, once this circuit has been activated by the additional information signal (Sz), on the arrival, without polarity violation, of the first incoming bit of the positive-polarity signal (pc), an additional bit is generated among the negative-polarity signals (nc') whereafter, on the arrival of the first bit of the negative-polarity signal (nc), an additional bit is generated among the positive-polarity signals (pc'). <IMAGE> |
