| 摘要 |
<p>PURPOSE:To exactly detect a time base error even in specific reproduction, etc., by generating a PWM signal corresponding to the count value of the cycle of a synchronizing signal, and blocking the output of the PWM signal when the disturbance of the synchronizing signal exceeds a prescribed value. CONSTITUTION:When a signal of high level is inputted to an input terminal 25 corresponding to dropout, an FF circuit 21 is reset, and the output of the FF circuit goes to a low level. Afterwards, the output of an FF22 goes to the low level, and a switch 24 is turned off. Consequently, the output of the PWM signal of an FF circuit 6 is blocked. Also, when a counter 8 counts a clock 1 up to the maximum value, the output signal of the counter 8 resets the circuit 21. Therefore, when a counter 9 counts 0 afterwards, the switch 24 is turned off. When the counter 8 performs a counting operation, and the count value is not counted up to the maximum value yet, an FF circuit 5 is reset. Therefore, the output of the FF circuit 21 goes to a high level when being triggered by the horizontal synchronizing signal 2. As a result, the switch 24 is turned on, and the PWM signal of the circuit 6 is outputted as an error signal.</p> |
