发明名称 INSULATING GATE TYPE LOGIC CIRCUIT
摘要 PURPOSE:To prevent the generation of a through current at the time of a stand by providing a circuit with respective logical gates connected to the respective output nodes of plural transfer gates and controlling the logical gate to be turned off at the time of the stand by. CONSTITUTION:In a barrel shifter in which input data I0-I7 is shifted based on shift control signals SH1, SH2 and outputted as output data O0-O7, a CMOS inverter IA, an IB selector array part SA of an input and an output sides are disposed and the pre- and post-stage transfer gates TA...,TB of the array part SA are constituted of N channel MOS transistors. Further, a selector output node SN... is earthed through an N channel MOS transistor TN..., the transistor TN... is gate controlled by a signal obtained by inverting an enable signal by a CMOS inverter IE1 and when the enable signal goes to O, the transistor TN is turned on to bring the SN to an earth potential.
申请公布号 JPS6382514(A) 申请公布日期 1988.04.13
申请号 JP19860227291 申请日期 1986.09.26
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 SAKAGAMI KENJI
分类号 G06F7/53;G06F7/00;G06F7/506;G06F7/52;G06F7/533;G06F7/76;H03K19/094;H03K19/0944;H03K19/0948;H03K19/177 主分类号 G06F7/53
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