| 摘要 |
PURPOSE:To attain high speed without losing the advantage of low power consumption of an arithmetic of low power consumption type by constituting the titled circuit by a logic processing section comprising plural number of series form switch arrays connected in parallel and an amplifier section includ ing a common emitter bipolar transistor (TR) to the base of which a logic output of the logic processing section is applied. CONSTITUTION:In bringing a control signal to a high level in the logic processing section LG by using complementary control signals C, inverse of C so as to control TRs Q01, Q02, switch arrays Q11, Q12-Q31, Q32 are made active and the circuit acts like a half adder. In bringing the signal C to a high level, switch arrays Q41, Q42-Q64,Q62 are made active and the circuit acts like a half subtractor. Sense circuits SA1, SA2 utilize a high transfer conductance of a bipolar TR to sense the output of the logic processing section and gives an output. Moreover, the logic of the logic processing section LG is constituted by one stage and its output amplitude is lowered as 0.8V, then the delay time of the arithmetic circuit is reduced remarkably.
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