| 发明名称 |
Method of forming holes in semiconductor integrated circuit device. |
| 摘要 |
<p>A recess is formed in the surface area of a layer-insulation film (14) by an isotropic etching process, and a hole is formed in the recess by a first anisotropic etching process. After this, a second anisotropic etching process is effected to taper the hole to remove an edge portion at the opening of the recess, the boundary portion between the recess and the side wall formed by the anisotropic etching process, and the vertical side wall of the hole. A wiring metal layer (19) is formed on part of the layer-insulation film (14) and in the hole.</p> |
| 申请公布号 |
EP0287096(A1) |
申请公布日期 |
1988.10.19 |
| 申请号 |
EP19880105978 |
申请日期 |
1988.04.14 |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
ABE, MASAHIRO C/O PATENT DIVISION;MASE, YASUKAZU C/O PATENT DIVISION |
| 分类号 |
H01L21/311;H01L21/302;H01L21/306;H01L21/3065;H01L21/3205;H01L21/331;H01L21/768;H01L29/73;H01L29/732;(IPC1-7):H01L21/308;H01L21/90 |
主分类号 |
H01L21/311 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
