发明名称 DMA TRANSFER CONTROL METHOD
摘要 PURPOSE:To perform DMA transfer at a high speed by finishing the accesses of a shared memory and a local memory in a single memory cycle. CONSTITUTION:The head address of a transfer shared memory is received together with the head address of a transferor local memory, and the number of transfer words via an address bus 310. These received addresses and the number of words are set at counters 420, 421 and 422 respectively and at the same time both FF 430 and 431 are turned on. Thus the address of the local memory set at a counter 421 is read out and transferred to the local memory. Then the contents of the local memory are read out and data are written into the address of the shared memory set at the counter 420. These actions are carried out in a single memory cycle. Then said operation is repeated in the frequency equal to the number of words transferred to complete the DMA transfer.
申请公布号 JPS63284659(A) 申请公布日期 1988.11.21
申请号 JP19870119062 申请日期 1987.05.18
申请人 HITACHI LTD;HITACHI ENG CO LTD 发明人 KAKIZUME YUJI;TATSUNAMI KAZUHIRO
分类号 G06F13/28 主分类号 G06F13/28
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